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VSORA développe des processeurs et solutions d’inférence IA pour les centres de données et les déploiements edge. Ils réduisent la latence, la consommation énergétique et le coût des requêtes d’IA.

Repères sur VSORA
Modèle
B2B
Siège
Meudon-la-Forêt
Domaine officiel
vsora.com
Création
2015 · 11 ans
Dernière levée
Late stage · 2026-07-01
Offres ouvertes
4

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La description complète publiée par VSORA.

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Next generation AI inference super-chip partitionning study in TSMC 5nm process Company presentation : VSORA is a French fabless semiconductor company delivering ultra-high-performance AI inference solutions for both data centers and edge deployments. Our proprietary architecture achieves exceptional implementation efficiency, ultra-low latency, and minimal power draw—dramatically cutting inference costs across any workload. Fully programmable and agnostic to both algorithms and host processors, our chips serve as versatile companion platforms.

A rich instruction set lets them seamlessly handle pure AI, pure DSP, or any hybrid of the two, all without burdening developers with extra complexity. To streamline development and shorten time-to-market, VSORA embraces industry standards: our toolchain is built on LLVM and supports common frameworks like ONNX and PyTorch, minimizing integration effort and customer cost.

After the tape-out of Horus chip (TSMC 5nm process) in the Jotunn SIP (from 2 to 8 chip per package), in October 2025, the next iteration of the chip is already on the way and requires evaluating how to split the design in a relevant way to achieve better quality of result and lower runtimes. Skills (mandatory, nice to have):

  • Languages : System Verilog, SystemC, Python, Tcl, bash, C++, cmake
  • STA basics (setup-hold, recovery-removal, Clock-domain crossing, …)
  • DFT basics (stuck at tests, test at speed, memory bist, …)
  • Low power ( level-shifting, power switching, isolation, UPF-1801 standard, ...)
  • Physical implementation basics (floorplanning, placement constraints, CTS concepts, ...) Internship content Length : 6 months Tasks :
  • Hands on with the implementation flow of an existing subblock 5M instances) (4 -5 months)
  • Study design architecture of the macro-block
  • Propose partitionning strategies
  • Study impacts on the following flow steps
  • Extending study on other macro blocks (optionnal)
  • Report redaction (0,5 month dedicated) Contacts : fbertrand@vsora.com(Grenoble), mlouvat@vsora.com(Grenoble), pebernard@vsora.com(Paris) Location : Grenoble office (internship location) : CEMOI A110 12 rue ampere 38000 Grenoble Paris office (2-3 travels): VSORA 15 Rue Jeanne Braconnier 92360 Meudon