Harmattan AI develops autonomous systems and mission-management software for defence. Armed forces and industrial clients use them for ISR, drone interception and electronic warfare.
FPGA Engineer - Radar Signal Processing
Harmattan AI recrute un ingénieur FPGA spécialisé en traitement radar à Paris. Le poste couvre la conception de pipelines temps réel, l’implémentation RTL, les simulations radar et la validation sur matériel, avec VHDL et/ou Verilog/SystemVerilog.
Information about Harmattan AI
- Model
- B2B
- Company type
- Venture-backed
- Stage
- Unicorn
- Headquarters
- Paris
- Official domain
- harmattan.ai
- Founded
- 2024 · 2 years
- Published headcount
- 226 employees
- Published valuation
- 1,4 Md$Source ↗
- Latest funding round
- Series B · 2026-01-12
- Amount announced
- 200 000 000 $
- Open jobs
- 108
Investors mentioned
Job details
The full description published by Harmattan AI.
About us
Harmattan AI is a next-generation defense prime building autonomous and scalable defense systems. Following the close of a $200M Series B, valuing the company at $1.4 billion, we are expanding our teams and capabilities to deliver mission-critical systems to allied forces. Our work is guided by clear values: building technologies with real-world impact, pursuing excellence in everything we do, setting ambitious goals, and taking on the hardest technical challenges. We operate in a demanding environment where rigor, ownership, and execution are expected.
About the role
As an FPGA Radar Engineer, you will help design and implement the real-time radar signal-processing pipeline that powers our drone sensing capabilities. You will work closely with hardware and embedded software engineers and be involved throughout the development cycle, from architecture and RTL implementation to integration and field validation. This role is ideal for an engineer with a strong background in DSP, practical FPGA experience, and a genuine interest in radar systems.
Responsibilities
Develop FPGA-based radar signal-processing pipelines, encompassing key stages such as pulse compression, Range/Doppler processing, CFAR detection, and target tracking handoff.
- Contribute to the RTL implementation of radar waveform generation and reception, including both FMCW and pulsed waveforms.
- Perform system-level radar simulations, including Range-Doppler maps, SNR modeling, clutter analysis, and assessment of detection performance under realistic conditions.
- Write and maintain testbenches and validation frameworks tailored to radar processing chains, enabling rapid debugging and iteration.
- Collaborate closely with RF and hardware engineers to ensure seamless integration between FPGA designs and the radar front end
- including antenna, Tx/Rx modules, ADC/DAC interfaces, timing, and synchronization.
- Document the interfaces between the radar processing core, system software, and hardware layers.
Candidate requirements
Master’s degree (or equivalent) in Electrical Engineering, Signal Processing, Applied Physics, or a related field.
- At least 3 years of hands-on FPGA development experience, including practical work with radar or sonar signal processing (using VHDL and/or Verilog/SystemVerilog).
- Strong working knowledge of radar signal processing fundamentals, including pulse compression, matched filtering, Range-Doppler processing, CFAR, and clutter rejection.
- Familiarity with FMCW and pulsed radar architectures, including waveform generation and digital back-end processing on FPGA.
- Solid foundation in DSP concepts: FFT, FIR/IIR filtering, windowing, fixed-point arithmetic, and precision management.
- Experience with test benches development and hardware-in-the-loop validation.
- Rigorous and collaborative, with the ability to work effectively across hardware, software, and systems teams.
- 100% dedication to Harmattan AI’s mission, vision, and ambitious growth plans, ready to go the extra mile to ensure operational excellence. We look forward to hearing how you can help shape the future of autonomous defense systems at Harmattan AI.
Requirements
- traitement du signal radar
- pulse compression
- Range-Doppler processing
- CFAR
- clutter rejection
- hardware-in-the-loop validation
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